Home
SOFICS Video Material
Search
Category:
SOI
Why ESD Co-Design is Essential for Next-Gen ICs
Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology
Optimized IP for GF’s 22nm FDX technology
Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology
ESD protection for SOI technology
ESD protection solutions for space applications
Comparing 22nm CMOS, 22nm SOI and 16nm FinFET technology (part 2)
Comparing 22nm CMOS, 22nm SOI and 16nm FinFET technology (part 1)
CDM robustness of SCR protection devices
ESD protection of interfaces with thin gate oxide transistors
Next Page
Subscribe
Subscribed
Sofics - Solutions for ICs
Join 35 other subscribers
Sign me up
Already have a WordPress.com account?
Log in now.
Sofics - Solutions for ICs
Subscribe
Subscribed
Sign up
Log in
Report this content
View site in Reader
Manage subscriptions
Collapse this bar
Sofics - Solutions for ICs 