Introduction about ESD protection: basic concepts to advanced applications

Koen Decock, ESD design specialist at Sofics, made a presentation for a full auditorium, organized by the local IEEE SSCS student chapter in Leuven. He talked about on-chip ESD protection, from the basic concepts to the more advanced applications.

Announcement of the presentation

The presentation file can be downloaded here.

The slides can also be browsed below.

Basic concepts

Koen started with an introduction about basic concepts like the ESD design window (more in a seperate article: link) and basic on-chip ESD protection devices based on NMOS transistors and diodes. Obviously he just scratched the surface. There are several other device concepts that can be used to protect semiconductor circuits.

Advanced applications

In the second part of his presentation, Koen provided background on key features that IC designers are looking for when selecting the right ESD protection clamps like low parasitic capacitance, enhanced ESD robustness, higher signal voltage tolerance and low standby leakage. He briefly touched on solutions for FinFET (full article) and BCD (full article) technology.

About Sofics

Koen concluded his talk with a short introduction about Sofics.

About Koen Decock

Koen Decock received the Master’s degree and the Ph.D. degree in Engineering Physics from the University of Gent in 2008 and 2012, respectively. From 2008 to 2012 he held a PhD fellowship at the Research Foundation – Flanders (FWO).

In 2012 he joined Sofics in Aalter, providing and designing ESD protections in many different technologies (CMOS, BCD, FinFET) applications. His current projects focus mainly on increasing IC robustness for automotive applications.

Contact us for more information

Contact us if you like to discuss your IC project or would like to host a similar presentation.

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Published by Bart Keppens

Chief Business Development at www.sofics.com Sofics is a foundry independent semiconductor IP provider that has supported 100+ companies worldwide with customized/specialty Analog IOs and on-chip ESD protection. Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost. Our technology has been characterized on 11 foundries including advanced nodes at TSMC, UMC, GF, Samsung Foundry.

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