Koen Decock, ESD design specialist at Sofics, made a presentation for a full auditorium, organized by the local IEEE SSCS student chapter in Leuven. He talked about on-chip ESD protection, from the basic concepts to the more advanced applications.
The presentation file can be downloaded here.
The slides can also be browsed below.
Koen started with an introduction about basic concepts like the ESD design window (more in a seperate article: link) and basic on-chip ESD protection devices based on NMOS transistors and diodes. Obviously he just scratched the surface. There are several other device concepts that can be used to protect semiconductor circuits.
In the second part of his presentation, Koen provided background on key features that IC designers are looking for when selecting the right ESD protection clamps like low parasitic capacitance, enhanced ESD robustness, higher signal voltage tolerance and low standby leakage. He briefly touched on solutions for FinFET (full article) and BCD (full article) technology.
Koen concluded his talk with a short introduction about Sofics.
About Koen Decock
Koen Decock received the Master’s degree and the Ph.D. degree in Engineering Physics from the University of Gent in 2008 and 2012, respectively. From 2008 to 2012 he held a PhD fellowship at the Research Foundation – Flanders (FWO).
In 2012 he joined Sofics in Aalter, providing and designing ESD protections in many different technologies (CMOS, BCD, FinFET) applications. His current projects focus mainly on increasing IC robustness for automotive applications.
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