ESD clamps for high voltage, BCD processes

Some applications really need high voltage interfaces and circuits. Think about power management and power conversion chips, automotive electronics for engine control, LCD or OLED display driver chips, motor driver electronics and industrial applications. These high voltage applications require other ESD protection clamps compared to the clamps used for protection of low voltage circuits.

Sofics has been involved in a number of chip projects that require custom ESD clamps for high voltage interfaces.

Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS, SOI and FinFET nodes.

ESD protection for 8.5 GHz LNA in 90nm

This article provides information about an SCR based ESD protection clamp for RF circuits validated in TSMC 90nm CMOS technology. The ESD protection clamp described has excellent figures of merit: Due to the low parasitic capacitance, low leakage and high Q-factor the influence on the RF performance is limited.

Protection of CMOS output drivers

Every computer chip needs on-chip ESD protection at its interfaces. Integrated circuits have different kinds of interfaces. This article discusses approaches to protect output drivers. This article compares different options for output drivers, focused on the NMOS transistor because that is the most sensitive part and is easily damaged during ESD stress.

ESD protection for 2.5D and 3D packages

More and more companies are turning to advanced semiconductor packaging. This trend has an effect on ESD protection. Earlier in 2021, Sofics submited a paper for the IP-SOC USA conference about ESD protection for 2.5D and 3D packaging. The abstract, the presentation and video are available here.

ESD protection for SOI technology

SOI technology introduces several challenges for the ESD designer. This article provided more background and example data on these issues. Fortunately, there are several ways to overcome those challenges. Sofics has supported IC companies with novel ESD concepts that improve IC performance and increase the ESD robustness.

ESD protection solutions for space applications

We frequently get questions about the applicability of our ESD and I/O solution IP for space applications. Semiconductor devices that are used at high elevation or in space need special attention during the design phase. Sofics technology has been used for a number of aerospace projects. In this article we provide more background and some example cases.