Since the advent of modern complementary metal oxide semiconductor (CMOS) integrated circuits (ICs), electrostatic discharge (ESD) has become a key concern for IC designers. ESD events pose a threat to IC reliability despite recent advances in foundry processing and die handling. This situation is actually set to get worse in the coming years given the concerted drive in the semiconductor industry to shrink device sizes further in keeping with Moore’s law.
Each new technology node has transistors with shorter gate lengths and thinner gate oxide. More recent ICs can be faster and/or more energy efficient but are also more sensitive to electrostatic discharge and overstress. Consequently, they can be damaged by ESD events which could normally be handled by older chips.
Even though proper on-chip ESD protection is critical to IC performance, it is not always straightforward to consider it early on in the IC design process. It is not uncommon to find out that ESD protection is still designed following a trial and error approach. This can be attributed in part to the fact that ESD protection schemes need to be customized to the specific IC which needs to be protected.
For example, an ESD protection circuit which works for an RF/wireless IC will typically be inappropriate for an automotive IC. In this article, I wish to introduce you to how we can use diode triggered silicon controlled rectifiers (DTSCRs) for on-chip ESD protection. In this article I will explain how a DTSCR works. In the second part, I show how its 3 main parameters – trigger voltage, holding voltage and failure current – can be tuned in order to protect ICs with very different characteristics.
There are various types of on-chip ESD protection suitable for advanced CMOS ICs. Over the years, we have seen a steady evolution from simple to more complex protection schemes. ESD protection solutions (see figure 1) have ranged from Zener diodes, bipolar junction transistors, N-type metal-oxide semiconductor (NMOS) transistors and finally silicon controlled rectifiers (SCRs).
SCRs are probably the most versatile on-chip ESD protection solution. SCR-based solutions are particularly attractive because they can be used to design protection circuits with a wide range of characteristics .i.e. departing from the same principle, it is possible to design ESD protection circuits for a wide range of applications.
A specific case of an SCR-based solution which can be used to develop a wide range of on-chip ESD protection circuits is the diode triggered SCR (DTSCR). As its name implies, a DTSCR is constructed by combining an SCR with diodes to form a versatile circuit whose properties can be tuned at will to suit the requirements of the IC/interface which needs to be protected. Figure 2 illustrates the possible configurations for a DTSCR. A and C represent the SCR Anode and Cathode respectively.
In this write up, I covered the basics. In the second part [Link] there is more information about adapting the behavior to specific interface requirements. There are many other aspects which need to be taken into account for practical devices.
For example, despite all their advantages, traditional SCR based ESD clamps have one glaring weakness – this is their speed of operation. When an ESD event occurs, the SCR needs some time to turn on. During that time, the voltage at the functional circuit can rise above the failure voltage.
In the DTSCR structure however, we used layout and design techniques to limit this problem.
- Because the DTSCR uses a trigger approach that is external to the SCR body, the Anode-Cathode distance can be designed with minimal dimensions. This dramatically improves turn-on speed compared to other approaches like the low voltage triggered SCR (LVTSCR).
- The trigger diode chain provides an alternative ESD current path to the ground while the SCR takes time to turn on. Once the SCR is fully turned on, it takes over from the diodes as the main ESD current path.
Additionally, in practical applications we need to tailor the DTSCR’s design to suit the specific requirements of the IC. For example, for a high speed IC, it is more important to have a DTSCR with low parasitic capacitance. On the other hand, for low power or battery operated circuits e.g. IoT devices, the DTSCR should be designed such that it’s leakage is as low as possible.
In the last 20 years, Sofics engineers have supported 100+ companies with customized ESD protection solutions. Additional information about ESD and SCR based ESD protection solutions can be found here:
- White Paper 1: A Case for Lowering Component Level HBM ESD Specifications and Requirements. LINK
- Diode-Triggered SCR (DTSCR) for RF-ESD Protection of BiCMOS SiGe HBTs and CMOS Ultra-Thin Gate Oxides. LINK
- Speed Optimized Diode-Triggered SCR for RF ESD Protection of Ultra-Sensitive IC Nodes in Advanced Technologies. LINK
- Improved Turn-on Behaviour in a Diode-Triggered Silicon-Controlled Rectifier for High-Speed Electrostatic Discharge Protection. LINK
- GGNMOS Triggered Silicon Controlled Rectifiers for ESD Protection in Deep Sub-micron CMOS Processes. LINK
- Solving the problems of traditional SCR based ESD protection. LINK
- Read the second part about adapting the Diode triggered SCR solutions. LINK
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