Sofics’ clipping circuit protects NFC circuits

Most new smartphones include Near Field Communication (NFC). There are already more than 1 billion NFC enabled phones. Clearly, the use of NFC has ramped up quickly. That’s nice because NFC can simplify aspects as diverse as communication, secure payments, user authentication, and also power retail loyalty programs.

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Problem: Excessive voltage

Adding NFC functionality to an integrated circuit involves connecting dedicated wireless interface pins to an antenna/coil. The voltage on those pads strongly depend on the distance between and alignment of transmit and read devices and the power of the transmitting device. Simulations by one of our customers showed a worst case of almost 10V between pads, which is rather high for advanced CMOS technology.

The excessive voltage can easily damage the circuit. There are 2 ways to cope with this problem

1. Use high voltage tolerant transistors

Designers can select a process technology that provides a high voltage transistor option. Fortunately, many NFC applications also require on-chip non-volatile memory (NVM). Such NVM circuits typically use a thicker gate oxide and foundries provide high voltage transistors for such embedded flash process flavors.

Several of Sofics’ customers have used those NVM transistors for the first stage of the antenna circuit. The problem is that high voltage transistors are easily damaged during electrostatic discharge (ESD) stress. A parallel on-chip ESD protection circuit (with 10V tolerance) is the easiest solution. Sofics has ESD clamps on several technology nodes that are used for the protection of NFC antenna pads.

Because high voltage (memory) transistors are typically rather weak during ESD stress it may be best to use a local ESD protection clamp in parallel.

2. Clipping excess voltage

It is possible to reduce the excess voltage with a so-called clipping or limiting circuit. The simple approach is to use a chain of diodes but due to the large amount of current the diode perimeter is rather large. This leads to high leakage current during non-clipped operation. Moreover, the clipping introduces higher harmonics in the signal.

Simple clipping variations based on diodes.

Sofics’ clipping circuit

Sofics has designed a novel clipping circuit to solve those issues.

Without excess voltage limiting circuits the voltage can get close to 10V. The Sofics’ clipping circuit limits the voltage between the +/- antenna pads to 3.6V during functional operation. The clip-level can be set at 2.2V for compatibility with low power 1.8V interfaces too.

The clipping circuit is used to protect the NFC antenna pads in an ultra-low power Bluetooth chip with ‘Touch-to-pair’ functionality. The product, processed in TSMC 55nm technology, is running in mass production and is used for all kinds of home automation and IoT applications.

Total area is 5500um² for a maximum current of 100mA. The clip-level can be set at 3.6V or at 2.2V. The clipping circuit can also be disabled when the pads are used as a general 1.8V General Purpose interface (GPIO).

More information?

Contact us to discuss how Sofics circuits can protect your RF interface against Electrostatic Discharge (ESD) or Electrical Overstress (EOS).

Published by Bart Keppens

Chief Business Development at Sofics is a foundry independent semiconductor IP provider that has supported 100+ companies worldwide with customized/specialty Analog IOs and on-chip ESD protection. Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost. Our technology has been characterized on 11 foundries including advanced nodes at TSMC, UMC, GF, Samsung Foundry.

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