Latch-up in CMOS circuits: threat or opportunity (part 2)

Latch-up refers to unwanted short circuits which can occur in an integrated circuit whereby the power supply is inadvertently connected to the ground. In the first part (threat) of the article the focus was on the threat of latch-up and different ways to prevent it. In this part (opportunity) we discuss how (parasitic) SCR devices can be used in a positive way.