I/O library for TSMC 12nm FinFET

Enable higher performance
Increase ESD robustness
Reduce time and cost

Most foundries provide GPIO libraries for free. These libraries contain power/ground cells, analog I/Os, digital I/Os. However, for some applications the general purpose library introduces limitations. Sofics developed solutions to extend the GPIO libraries.

Interface solution with low parasitic capacitance

Interface solution for low-voltage I/Os below 1.8V.

Low leakage interface solutions

Any ESD robustness level

Higher voltage tolerance like 5V

12nm – Library contents

  • Low-leakage ESD power clamps for different voltage domains (0.8V – 3.3V).
  • Analog I/Os for the different voltage options with full local ESD protection so there is no need to worry about power bus resistance.
  • Solutions for high-speed communication with low parasitic capacitance. Cells can be adapted for your requirement. Example: 100fF for 1kV HBM.
  • Analog I/Os with higher voltage tolerance (e.g. 5V) or overvoltage tolerant for hot-swap, cold-spare, failsafe interfaces.

Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost.

About Sofics

Sofics is a foundry independent semiconductor IP provider that has supported 100+ companies worldwide with customized/specialty Analog I/Os and on-chip ESD protection. The technology has been characterized on most CMOS processes, as well as on SiGe, SOI, BCD and advanced FinFET nodes like 16nm, 12nm, 7nm, 6nm and 5nm.

Request a copy of our measurement report

Contact us to get a copy of our TSMC 12nm measurement report.

Reuse of Sofics IP in Toshiba’s ASIC products has consistently resulted in robust Charged Device Model (CDM) performance.

Kenji Numata, Senior manager, Toshiba semiconductor company

Contact us to discuss your requirements

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