Enable higher performance
Increase ESD robustness
Reduce time and cost
ESD protection in FinFET technology is challenging. FinFET devices are sensitive to ESD stress. Conventional ESD devices are no longer effective.
Get the best Analog I/Os
for your next FinFET IC design.
Most foundries provide I/O libraries for free. However, for several application types the general purpose I/Os introduce all kinds of limitations. Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost.
Sofics is a foundry independent semiconductor IP provider that has supported 100+ companies worldwide with customized/specialty Analog I/Os and on-chip ESD protection. The technology has been characterized on advanced FinFET nodes like 16nm, 12nm, 7nm, 6nm and 5nm. Contact us to get a copy of our measurement reports.
Battery powered applications
IC designers have integrated Sofics ESD in systems running for 10-years on 1 coin battery. The leakage of our ESD cells is 100x lower compared to conventional approach. Huge improvements can be made in stand-by, sleep, operational modes and during power-cycles.
One of the key challenges designers struggle with is the need to limit the parasitic capacitance at the interface pads. Sofics engineers have delivered ESD protection with low parasitic capacitance (50fF or lower) for optical, wired and wireless interfaces.
Enable signal voltage below/beyond standard levels
Some applications require Analog I/Os for voltage below or beyond the IO library voltage limits. Sofics has proven ESD solutions to allow 3.3V and 5V applications in most FinFET processes.
Sofics offered us flexibility with customization, a proven silicon ESD portfolio and fast time to market. Within just a few weeks we went from first contact to contract to solution delivery.
Phil Horsfield, VP Silicon at Graphcore
about our 16nm FinFET solutions